(1) Field of the Invention
The present invention relates to a multiprocessor system having two or more processor elements, and more particularly to a multiprocessor system, a multiprocessor control method and a multiprocessor control program retaining computer-readable recording medium, for example, suitable for use in portable information communication terminal units such as portable telephone terminals, PHS (Personal Handyphone System) terminals.
(2) Description of the Related Art
In portable information communication terminal units such as portable telephone terminals and PHS (Personal Handyphone System) terminals, in addition to various control processing on an OS (Operating System), for example, there have been conducted the processing for compression/expanding of voice, image, moving image or the like and the processing for handling input/output signals. In general, an MPU (Micro Processing Unit) is suitable for various processing to be conducted on an OS, while a DSP (Digital Signal Processor) is suitable for the real-time processing such as the voice, image or moving image handling processing and the input/output signal handling processing.
In addition, there have been known DSP microcomputers and multiprocessor systems for conducting these different processing in the information processing apparatus.
The DSP microcomputer comprises a processor architecture setting up the integration of an MPU function capable of conducting the OS processing efficiently and a DSP function capable of conducting signal processing or the like at a high speed. The proper use between the MPU function and the DSP function integrated with each other in this DSP microcomputer is feasible in a manner that MPU instructions and DSP instructions are described in one program in a state mixed according to applications.
Moreover, in this programming, the use of an MPU instruction compatible with an existing MPU can relatively facilitate the porting of an existing OS onto the DSP microcomputer, and the use of a DSP instruction interchangeable with an existing DSP enables the utilization of the existing DSP signal processing software properties, while the DSP instruction can be described as a task under OS management.
Still moreover, in the design of the architecture of the DSP microcomputer, if the pipeline structure is made to meet the characteristic of any one of the MPU function and the DSP function, then this realizes fast processing.
For example, the speed-up of the processing is feasible by structuring a multistage pipeline to the characteristic of the MPU function while decreasing the branch overhead according to various control conditions. In addition, the speed-up of the processing is feasible through the compression in the time-axis direction in a manner that, to the characteristic of the DSP function, the load/store overhead of the memory is reduced and a plurality of sum-of-products operations are conducted in the form of pipeline. Still additionally, the speed-up of the processing is also possible in a manner that loop processing is conducted at a high speed by means of the space-direction expansion using the parallel processing.
The multiprocessor system is equipped with a plurality of processor elements, for example, an MPU and a DSP so that the MPU conducts the processing on the OS while the DSP controls the signal processing. Moreover, a conventional multiprocessor system has an existing MPU and an existing DSP, which can facilitate the construction of a system and can utilize the existing software properties effectively.
There is a problem, however, in that, because the DSP microcomputer has the integration of the DSP function into the MPU pipeline structure as mentioned above, a pipeline structure optimal to the DSP is not always made in the DSP microcomputer, which can lower the DSP performance. That is, in the DSP microcomputer, difficulty is experienced in designing both the MPU and DSP to 100% exhibit their performances.
In addition, for the development of an LSI for the DSP microcomputer, there is a need to develop a new architecture for the DSP microcomputer, and this development requires an extremely long time and an extremely high cost.
In particular, since the DSP microcomputer has the integration of the MPU and the DSP which are processor pipelines originally different in architecture from each other, difficulty is experienced in developing/designing an architecture optimal to each processing according to the cycles of the market requirements for a short time, and in optimizing the performance of the MPU or the DSP. Moreover, in fact, it is difficult to design it while maintaining the compatibility between the DSP microcomputer and the existing MPU or DSP, which makes it difficult to divert the software properties for the existing MPU or DSP.
Meanwhile, in the conventional multiprocessor system, difficulty is encountered in programming while providing excellent convenience in a state where an MPU instruction and a DSP instruction, which are different in function from each other, are mixed with effect. Moreover, in the conventional multiprocessor system, since each of processor elements is made to operate independently, difficulty is experienced in seizing a flow of the processing of a program implemented in each processor element, thus making difficult the programming and debug.
Furthermore, in the conventional multiprocessor system, for the interchange of data between the MPU and the DSP, there is a need to conduct the exclusive control processing, the synchronous processing or the like, and this imposes a burden on the software developments considering these processing, and the overhead in the exclusive control processing or the synchronous processing lowers the performance.
Still furthermore, although information processing terminals such as portable telephones are required to reduce the power consumption, the conventional multiprocessor system encounters the difficulty of the reduction of the power consumption because the respective processor elements operate simultaneously.
In addition, in the conventional multiprocessor system, although the MPU and the DSP share data by means of the loose coupling, the MPU and the DSP are strictly made to operate independently of each other, which makes it difficult to place an MPU instruction and a DSP instruction in a state mixed in one program.
Meanwhile, if the processing contents of one program described in a high-level language such as the C language can be decided through the use of a tool such as the compiler and the processing can be divided into specific processing units (function units, thread units, or the like) so that the divided processing are allocated to the optimum processors according to the processing contents to conduct the distributed processing on the multiprocessor in a state synchronized, this signifies that a programmer can describe a program, apparently one in number, which enables the proper use of the processing according to an MPU instruction and the processing according to a DSP instruction with efficiency.
However, in fact, it is very difficult from the technical point of view for a programming tool to automatically make a decision on which of processors is optimum to each processing unit, and such a tool capable of optimizing it in full automation has not come into widespread use yet. Moreover, in the case of the interrupt control which has been realized with the conventional multiprocessor system, even if a centralized control type interrupt controller is put to use, it cannot realize that the programs described in the form unified work as a flow of one program in a state synchronized among a plurality of processors. This is because the flow of one program destroys, for example, when an interruption occurs after the program processing straddles a plurality of processors